Electrical computers and digital data processing systems: input/ – Input/output data processing – Concurrent input/output processing and data transfer
Reexamination Certificate
2004-08-15
2009-06-23
Nguyen, Tanh Q (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Concurrent input/output processing and data transfer
C710S029000, C710S036000, C710S040000, C710S244000, C709S200000, C709S213000, C709S214000, C718S106000, C712S216000, C712S220000, C712S225000, C711S141000, C711S150000, C711S151000, C711S168000
Reexamination Certificate
active
07552247
ABSTRACT:
A method and apparatus for a multiprocessor system to simultaneously process multiple data write command issued from one or more peripheral component interface (PCI) devices by controlling and limiting notification of invalidated address information issued by one memory controller managing one group of multiprocessors in a plurality of multiprocessor groups. The method and apparatus permits a multiprocessor system to almost completely process a subsequently issued write command from a PCI device or other type of computer peripheral device before a previous write command has been completely processed by the system. The disclosure is particularly applicable to multiprocessor computer systems which utilize non-uniform memory access (NUMA).
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Berg Thomas B.
Beyer Dale A.
Moga Adrian C.
Bennett Steven Lieske
International Business Machines - Corporation
Nguyen Tanh Q
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