Electrical computers and digital data processing systems: input/ – Intrasystem connection – System configuring
Reexamination Certificate
2009-10-01
2011-10-25
Knoll, Clifford (Department: 2111)
Electrical computers and digital data processing systems: input/
Intrasystem connection
System configuring
C716S030000, C712S033000
Reexamination Certificate
active
08046511
ABSTRACT:
Methods and apparatus are provided for efficiently implementing signal processing cores as application specific processors. A signal processing core, such as a Fast Fourier Transform (FFT) core or a Finite Impulse Response (FIR) core includes a data path and a control path. A control path is implemented using processor components to increase resource efficiency. Both the data path and the control path can be implemented using function units that are selected, parameterized, and interconnected. A variety of signal processing algorithms can be implemented on the same application specific processor.
REFERENCES:
patent: 5751592 (1998-05-01), Takai et al.
patent: 5867400 (1999-02-01), El-Ghoroury et al.
patent: 6341094 (2002-01-01), Auracher
patent: 6408428 (2002-06-01), Schlansker et al.
patent: 6425116 (2002-07-01), Duboc et al.
patent: 6581187 (2003-06-01), Gupta et al.
patent: 6651222 (2003-11-01), Gupta et al.
patent: 6708144 (2004-03-01), Merryman et al.
patent: 6728939 (2004-04-01), Johannsen
patent: 6829754 (2004-12-01), Yu et al.
patent: 6907592 (2005-06-01), Dante
patent: 6971066 (2005-11-01), Schultz et al.
patent: 7117015 (2006-10-01), Scheinert et al.
patent: 7290244 (2007-10-01), Peck et al.
patent: 7392489 (2008-06-01), Jackson et al.
patent: 7409533 (2008-08-01), Jones
patent: 7613858 (2009-11-01), Jackson et al.
patent: 2002/0055947 (2002-05-01), Schultz et al.
patent: 2002/0133784 (2002-09-01), Gupta et al.
patent: 2002/0194236 (2002-12-01), Morris
patent: 2003/0200538 (2003-10-01), Ebeling et al.
patent: 2004/0204097 (2004-10-01), Scheinert et al.
patent: 2004/0250231 (2004-12-01), Killian et al.
patent: 2005/0068943 (2005-03-01), Scheinert
patent: 2005/0138586 (2005-06-01), Hoope et al.
patent: 2005/0251647 (2005-11-01), Taylor
patent: 2007/0054668 (2007-03-01), Scheinert et al.
Office Action mailed Feb. 14, 2007, for U.S. Appl. No. 11/042,887.
Office Action mailed Jul. 16, 2007, for U.S. Appl. No. 11/042,887.
Office Action mailed Dec. 21, 2007, for U.S. Appl. No. 11/042,887.
Office Action mailed Sep. 17, 2008, for U.S. Appl. No. 11/042,887.
Final Office Action mailed Mar. 18, 2009, for U.S. Appl. No. 11/042,887.
Notice of Allowance mailed Jun. 24, 2009, for U.S. Appl. No. 11/042,887.
Chung, et al., “Macrocell/Microcell Selection Schemes Based on a New Velocity Estimation in Mutitier Cellular System” (Abstract only), Publication Date Sep. 2002.
Arbit, et al., “A DSP—Controlled PWM generator using Field Programmable Gate Array,” (Abstract only) Publication date Sep. 6-7, 2004.
Warren, Webb, “EPIC Computer Features GPS, Data Acquisition, and Expansion,” www/edn.com, Jul. 22, 2004, Jun. 1, 2004.
Kevin Morris, “FPGA and Programmable Logic, Catapult C,” FPGA and Programmable Logic Journal, Jun. 1, 2004.
Gabe Moretti, Mentor Graphics Corp., “C Tool Provides Algorithmic Synthesis,” EDN, Jun. 1, 2004.
Office Action mailed Mar. 20, 2007 for U.S. Appl. No. 11/040,152.
Final Office Action mailed Aug. 13, 2007 for U.S. Appl. No. 11/040,152.
Notice of Allowance mailed Feb. 13, 2008, for U.S. Appl. No. 11/040,152.
Hettiaratchi Sambuddhi
Jackson Robert
Altera Corporation
Knoll Clifford
Weaver Austin Villeneuve & Sampson LLP
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