Increasing the quantity of I/O decode ranges using SMI traps

Electrical computers and digital data processing systems: input/ – Interrupt processing – Programmable interrupt processing

Reexamination Certificate

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C310S261100, C310S266000, C310S119000, C310S314000, C310S104000, C310S311000, C310S317000, C310S269000, C713S001000, C713S002000, C711S114000, C711S145000, C717S166000

Reexamination Certificate

active

10909657

ABSTRACT:
A method of increasing the quantity of input/output (I/O) decode ranges using system management interrupts (SMI) traps is disclosed. In one aspect, the present disclosure teaches a method of increasing the quantity of I/O decode ranges using SMI traps in a chipset including generating a system management interrupt (SMI) based on information causing access to an I/O address that triggers a SMI trap. The I/O address operably received at the chipset via a bus. The method further including automatically reprogramming a decode register in the chipset such that the I/O address forwards the information to a device on the bus.

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