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Quad aware locking primitive

Electrical computers and digital data processing systems: input/ – Access locking
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Quad pumped bus architecture and protocol

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation
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Quad pumped bus architecture and protocol

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation
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Quality of service (QoS) processing of data packets

Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output access regulation
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Quality of service for data storage volumes

Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output access regulation
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Queue circuit and method for memory arbitration employing same

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation
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Queue circuit and method for memory arbitration employing same

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation
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Queue control device for and queue control method of...

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
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Queue depth management for communication between host and...

Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output access regulation
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Queue having distributed multiplexing logic

Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output data buffering
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Queue incorporating a duplicate counter per entry

Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output data buffering
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Queue management system having one read and one write per...

Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output data buffering
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Queue manager for a buffer

Electrical computers and digital data processing systems: input/ – Input/output data processing – Flow controlling
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Queue measurement apparatus and methodology

Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output data buffering
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Queue sharing

Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output data buffering
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Queue-based predictive flow control mechanism

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation
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Queue-based predictive flow control mechanism with indirect...

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation
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Queue-based spin lock with timeout

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
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Queued arbitration mechanism for data processing system

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation
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Queued arbitration mechanism for data processing system

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation
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