Architecture for an output buffered switch with input groups

Architecture for dynamically reprogrammable arbitration...

Architecture for implementing virtual multiqueue fifos

Architecture for managing disk drives

Architecture for multi-queue storage element

Architecture for optimizing audio and video operating modes...

Architecture of reconfigurable radio processor

Architecture that converts a half-duplex bus to a...

Architecture using dedicated endpoints and protocol for...

Architecture, circuitry and method for transmitting n-bit...

Architecture, circuitry and method of transferring data into...

Architecture, system and method for ensuring an ordered...

Arrangement and method for allowing sequence-independent command

Arrangement and method for controlling dataflow on a data bus

Arrangement and method for improving the data integrity with a r

Arrangement and method for signal processing and storing

Arrangement and method relating to handling of digital signals a

Arrangement for controlling peripheral component interconnect (P

Arrangement for data transfer between a computer and...

Arrangement for instigating work in a channel adapter based...