Architecture for dynamically reprogrammable arbitration...

Details Architecture for dynamically reprogrammable arbitration... Architecture for dynamically reprogrammable arbitration...

2006-01-27

2008-11-18

Knoll, Clifford H (Department: 2111)

Electrical computers and digital data processing systems: input/

Access arbitrating

Hierarchical or multilevel arbitrating

C710S117000

Reexamination Certificate

active

07454546

ABSTRACT:
An architecture for a Block RAM (BRAM) based arbiter is provided to enable a programmable logic device (PLD) to efficiently form a memory controller, or other device requiring arbitration. The PLD arbiter provides low latency with a high clock frequency, even when implementing complex arbitration, by using BRAM to minimize PLD resources required. The architecture allows multiple complex arbitration algorithms to be used by allowing the multiple algorithms to be stored in BRAM. With multiple algorithms, dynamic configurability of the arbitration can be provided without halting the arbiter by simply changing an algorithm stored in BRAM. Additionally, algorithms can by dynamically modified by writing to the BRAM. With BRAM memory used for arbitration, PLD resources that would otherwise be wasted are frees up to be used by other components of the system.

REFERENCES:
patent: 5481680 (1996-01-01), Larson et al.
patent: 5822758 (1998-10-01), Loper et al.
patent: 6985985 (2006-01-01), Moss
Xilinx, Inc., “High Performance Multi-Port Memory Controller”, Application Note,, XAPP535, Dec. 10, 2004, pp. 1-190, v1.1, available from Xilinx, Inc., 2100 Logic Drive, San Jose, CA 95124.

Affiliated with

Also associated with

Rating

Architecture for dynamically reprogrammable arbitration... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Architecture for dynamically reprogrammable arbitration..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Architecture for dynamically reprogrammable arbitration... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4046099