Asynchronous clock domain crossing jitter randomiser
Atomic transaction processing for logic simulation
Automated bottom-up and top-down partitioned design synthesis
Automated test vector generation and verification
Automatic adjustment for counting instrumentation
Automatic ATAP test bench generator
Automatic check for cyclic operating conditions for SOI...
Automatic time warp for electronic system simulation
Automatic, hierarchy-independent partitioning method for...
Back annotation apparatus for carrying out a simulation...
Behavioral modeling of high speed differential signals based...
Bidirectional wire I/O model and method for device simulation
Bitcell simulation device and methods
Block diagram modeling
Bus performance evaluation method for algorithm description
Bus performance evaluation method for algorithm description
Bus structure, database and method of designing interface
BZFLASH subcircuit to dynamically supply BZ codes for...
Capacitance measurements for an integrated circuit
Cell modeling in the design of an integrated circuit