Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system – Circuit simulation
Reexamination Certificate
2005-12-06
2005-12-06
Jones, Hugh (Department: 2128)
Data processing: structural design, modeling, simulation, and em
Simulating electronic device or electrical system
Circuit simulation
C326S030000, C326S062000
Reexamination Certificate
active
06973421
ABSTRACT:
A design and verification aide that can be used to produce BZ codes under static or dynamic process, voltage, temperature and external reference resistor (PVT and R) conditions for impedance controlled buffers or any other application using BZ codes. The simulation technique follows that of a flash ADC, and effectively replaces an awkward state-machine BZ controller with a subcircuit consisting of 5 BZREFN's, 5 BZREFP's, 10 HSPICE behavioral comparators, and the BZVREF. The resulting N- and P-codes may be adjusted by a parameterized dither count with minimum and maximum code values enforced by the model, and the comparators can be modified to model offset voltage.
REFERENCES:
patent: 5751161 (1998-05-01), Wei et al.
patent: 6566903 (2003-05-01), Mandal et al.
Jones Hugh
LSI Logic Corporation
Trexler, Bushnell Giangiorgi, Blackstone & Marr, Ltd.
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