Automatic, hierarchy-independent partitioning method for...

Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system – Circuit simulation

Reexamination Certificate

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C716S030000

Reexamination Certificate

active

08060355

ABSTRACT:
A method of providing simulation results includes detecting any power net and rail in a circuit netlist. The circuit can be divided into net-partitioned blocks. Using these net-partitioned blocks, a topological analysis can be performed to identify cuttable/un-cuttable devices and synchronization requirements. Then, the circuit can be re-divided into rail-partitioned blocks. Using these rail-partitioned blocks, a sparse solver can identify potential partitions, but eliminate fill-ins as determined by the topological analysis. A cost function can be applied to the potential partitions as well as the identified cuttable/un-cuttable devices to determine final cut points in the circuit and dynamic inputs to the final blocks. Simulation can be performed on the final blocks and simulation results can be generated.

REFERENCES:
patent: 5379231 (1995-01-01), Pillage et al.
patent: 6577992 (2003-06-01), Deng et al.
patent: 6807520 (2004-10-01), Zhou et al.
patent: 7555733 (2009-06-01), Gee et al.
patent: 2004/0044510 (2004-03-01), Zolotov et al.

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