Asynchronous clock domain crossing jitter randomiser

Details Asynchronous clock domain crossing jitter randomiser Asynchronous clock domain crossing jitter randomiser

2004-03-30

2009-12-29

Sorrell, Eron J (Department: 2182)

Data processing: structural design, modeling, simulation, and em

Simulating electronic device or electrical system

Circuit simulation

C703S015000, C703S016000, C703S017000, C703S019000

Reexamination Certificate

active

07640151

ABSTRACT:
A method and system for simulation of an electronic circuit is provided, the circuit being represented by a network of a plurality of logic elements, the circuit comprising first and second asynchronous clock domains, whereby jitter elements are additionally inserted at predetermined portions of circuit boundaries between the first and second clock domains, the jitter elements being represented as logic elements, the values of which are randomly set.

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