Reducing time to measure constraint parameters of components...
Reducing variation in randomized nanoscale circuit connections
Reducing verification time for integrated circuit design...
Reduction of cross-talk noise in VLSI circuits
Reduction of process antenna effects in integrated circuits
Reduction of storage elements in synthesized synchronous...
Reduction of storage elements in synthesized synchronous...
Reduction of XOR/XNOR subexpressions in structural design...
Redundant via rule check in a multi-wide object class design...
Redundantly tied metal fill for IR-drop and layout density...
Reference image generation from subject image for...
Reformulation of the finite-difference time-domain algorithm...
Region-based voltage drop budgets for low-power design
Regional clock skew measurement technique
Regional signal-distribution network for an integrated circuit
Regional signal-distribution network for an integrated circuit
Regional signal-distribution network for an integrated circuit
Register file and method for designing a register file
Register file timing using static timing tools
Register retiming technique