Reducing variation in randomized nanoscale circuit connections

Details Reducing variation in randomized nanoscale circuit connections Reducing variation in randomized nanoscale circuit connections

2005-02-08

2005-02-08

Garbowski, Leigh M. (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C977S726000

Reexamination Certificate

active

06854092

ABSTRACT:
A method and apparatus of reducing variations in nanoscale circuit connections. One exemplary embodiment includes: placing a first connector between a first addressing wire and a first nanowire in a partial circuit; and applying bias to the partial circuit so that a second connector is placed between a second addressing wire and a second nanowire. This method of bias connections is repeated for each wire in the full circuit. Thus, bias is used to influence the positioning of connectors on additional wires (if any) in the full circuit.

REFERENCES:
patent: 6128214 (2000-10-01), Kuekes et al.
patent: 6256767 (2001-07-01), Kuekes et al.
patent: 6314019 (2001-11-01), Kuekes et al.
patent: 6459095 (2002-10-01), Heath et al.
patent: 6548841 (2003-04-01), Frazier et al.
G.L. Snider et al., “Quantum-Dot Cellular Automata,” Int'l Microprocessors and Nanotechnology Conference, Jul. 1999, pp. 90-91.

Affiliated with

Also associated with

Rating

Reducing variation in randomized nanoscale circuit connections does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Reducing variation in randomized nanoscale circuit connections, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Reducing variation in randomized nanoscale circuit connections will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3487798