Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-06-06
2006-06-06
Whitmore, Stacy A. (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
07058907
ABSTRACT:
A process for reducing cross-talk noise in a VLSI circuit is disclosed. The process identifies a victim net in an integrated circuit and calculates a change in ground capacitance for the victim net to identify a noise amplitude less than or equal to a maximum allowable noise height. The process selects from a library one cell or a grouping of cells having an input capacitance for the victim net closest to the change in ground capacitance. The selected cell or grouping of cells is coupled to the victim net so that its change in ground capacitance provides a noise amplitude less than (or less than or equal to) an allowable maximum noise height that may be a predetermined value. A system for reducing cross-talk noise in a VLSI circuit is also disclosed.
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Buch Premal
Savoj Hamid
Tuncer Emre
Fenwick & West LLP
Magma Design Automation Inc.
Whitmore Stacy A.
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