Reformulation of the finite-difference time-domain algorithm...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000

Reexamination Certificate

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07340695

ABSTRACT:
A hardware-based acceleration platform for computational electromagnetic algorithms, specifically the finite-difference time-domain (“FDTD”) method, comprises reformulating the FDTD algorithm in order to make it more hardware friendly. This reformulation makes use of split fields at every node in the mesh, and combines total- and scattered-field formulations into a single, hybrid formulation. By precomputing coefficients for the nodes in the mesh, it is possible for a single set of equations to support plane waves, point sources, PML ABCs, and PEC walls. In the method sources are determined by means of a lookup table, rather than through direct hardware computations. All of these modifications enable the hardware designer to much more easily develop an FDTD accelerator.

REFERENCES:
patent: 2004/0225483 (2004-11-01), Okoniewski et al.
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N.N. Rao,Elements of Engineering Electromagnetics(Fourth Edition), Prentice Hall, Englewood Cliffs, New Jersey (1999).
A. Taflove et al.,Computational electrodynamics: the finite-difference time-domain method, 2nd Ed., Artech House, Inc. , Northwood, MA (2000).
M.N.O. Sadiku,Numerical techniques in electromagnetics, CRC Press, Inc., Boca Raton: (2001).
P. Placidi et al., “A Custom VLSI Architecture for the Solution of FDTD Equations,”IEICE Transactions on Electronics, vol. E85-C, pp. 572-577, No. 3 (Mar. 2002).
R.N. Schneider et al., “Application of FPGA Technology to Accelerate the Finite-Difference Time-Domain (FDTD) Method,” presented at The Tenth ACM International Symposium on Field-Programmable Gate Arrays, Monterey, CA (2002).
J.P. Durbano et al., “Hardware Acceleration of the 3D Finite-Difference Time-Domain Method,”IEEE Antennas and Wireless Propagation Letters, vol. 2, pp. 54-57, 2003.
W. Chen et al., “An FPGA Implementation of the Two Dimensional Finite-Difference Time-Domain (FDTD) Algorithm,” presented at The Twelfth ACM International Symposium on Field-Programmable Gate Arrays (FPGA) (2004).

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