Vector logic techniques for multilevel minimization with...
Vector sequence simplification for circuit verification
Vectorless instantaneous current estimation
Vectorless instantaneous current estimation
Vendor independent method to merge coverage results for...
Verification apparatus, design verification method, and...
Verification equipment of semiconductor integrated circuit,...
Verification of 3D integrated circuits
Verification of an extracted timing model file
Verification of design blocks and method of equivalence...
Verification of digital circuitry using range generators
Verification of embedded test structures in circuit designs
Verification of highly optimized synchronous pipelines via...
Verification of integrated circuit designs using buffer control
Verification of integrated circuit tests using test...
Verification of requirements specification, design...
Verification of RRAM tiling netlist
Verification of sensitivity list integrity in a hardware...
Verification of sequential circuits with same state encoding
Verification of spare latch placement in synthesized macros