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Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Testing or evaluating

Reexamination Certificate

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C716S106000

Reexamination Certificate

active

07900183

ABSTRACT:
A method, computer program product, and data processing system for combining results regarding test sequences' coverage of events in testing a plurality of related semiconductor designs are disclosed. Test patterns are randomly generated by one or more “frontend” computers. Results from applying these patterns to the designs under test are transmitted to a “backend” computer in the form of an ordered dictionary of events and bitmap and/or countmap data structures. The backend computer combines results from each test sequence in a cumulative fashion to measure the overall coverage of the set of test sequences over the plurality of designs.

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