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Selected: P

Pitch-based subresolution assist feature design

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Place and route scan chain partitioning by clock regions

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Place-and-route layout method with same footprint cells

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Physical design processing
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Place-and-route with power analysis

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Place-holding library elements for defining routing paths

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Placement and routing method in two dimensions in one plane...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Placement and routing method to reduce Joule heating

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Placement and routing using inhibited overlap of expanded areas

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Physical design processing
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Placement based design cells injection into an integrated...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Placement based design cells injection into an integrated...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Placement driven control set resynthesis

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Physical design processing
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Placement driven routing

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Physical design processing
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Placement method for integrated circuit design using...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Placement method for integrated circuit design using...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Placement method for integrated circuit design using...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Placement of a clock signal supply network during design of...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Placement of clock objects under constraints

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Placement of conductive stripes in electronic circuits to...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Placement of configurable input/output buffer structures...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Placement of I/O blocks within I/O banks using an integer...

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Physical design processing
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