Place-and-route with power analysis

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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Details

C716S030000, C716S030000, C716S030000, C703S014000

Reexamination Certificate

active

06950998

ABSTRACT:
Method and apparatus for placing and routing an electronic circuit design. Various embodiments are disclosed for analyzing placed and/or routed designs for power consumption characteristics and timing characteristics. New designs are iteratively generated in order to reduce power consumption and satisfy timing requirements of the design.

REFERENCES:
patent: 5831864 (1998-11-01), Raghunathan et al.
patent: 6345379 (2002-02-01), Khouja et al.
patent: 2002/0069396 (2002-06-01), Bhattacharya et al.

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