Bus arbitration system for concurrent use of a system bus by mor

Bus arbitration with master unit controlling bus and locking a s

Bus architecture for digital signal processor allowing time mult

Bus architecture for integrated data and video memory

Bus bridge circuit flushing buffer to a bus during one acquire/r

Bus bridge circuit having configuration space enable register fo

Bus collision avoidance system for distributed network data proc

Bus competitive control apparatus

Bus connection system

Bus contention circuit

Bus control circuit for latching and maintaining data independen

Bus control device comprising a plurality of isolatable segments

Bus control device for computer system having computer and DMA d

Bus control for a plurality of digital signal processors connect

Bus control for small computer system interface with transfer in

Bus control method and apparatus

Bus control preemption logic

Bus control system and method that selectively generate an early

Bus control system for arbitrating requests with predetermined o

Bus control system for shortening bus occupation time