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I-phase controls for a computer

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I-Q channel adaptive line enhancer

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I.sup.2 L Full adder and ALU

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I/O access method for using flags to selectively control data op

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I/O Adapter with direct memory access to I/O control information

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I/O Bus clock

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I/O bus to system interface

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I/O bus transceiver for a data processing system

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I/O Bus transceiver for a data processing system

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I/O cache with dual tag arrays

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I/O Channel bus

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I/O control system and method

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I/O control system for a plurality of peripheral devices

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I/O Control system for data transmission and reception between c

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I/O control system having a plurality of access enabling bits fo

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I/O Control system having a plurality of access enabling bits fo

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I/O control system using buffer full/empty and zero words signal

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I/O controller for controlling the sequencing of execution of I/

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I/O controller for multiple disparate serial memories with a cac

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I/O Controller for transferring data between a host processor an

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