Bus architecture for integrated data and video memory

Details Bus architecture for integrated data and video memory Bus architecture for integrated data and video memory

1992-05-19

1993-11-23

Chun, Debra A.

Boots, shoes, and leggings

395425, 364DIG1, 3642384, 3642402, 364243, 3642437, G06F 1316

Patent

active

052652181

ABSTRACT:
A bus architecture and protocol for integrated data and video memory. A high speed dedicated memory bus is coupled to a memory controller. The memory controller is in turn coupled to a multiple processor bus interconnecting one or more processors. Single in-line memory modules (SIMMs) incorporating dynamic random access memory (DRAM), video RAM (VRAM), and static nonvolatile RAM (SRAM) are coupled to the memory bus. Bus control signals forming a bus protocol, and address and data lines from the memory controller are shared by all memory modules operating on the memory bus. Certain control signals invoke specific operations on memory modules or are ignored, depending on the type of memory module receiving the control signal. The memory modules incorporate the consistent protocol by virtue of a consistent control signal pin out. The SIMMs further incorporate buffering and conversion functions, thereby relieving the memory controller of service overhead associated with these functions. Integrating all forms of memory into a single data and video memory architecture permits a highly functional dedicated memory bus to be connected to the computer system.

REFERENCES:
patent: 4181933 (1980-01-01), Benysek
patent: 4628467 (1986-12-01), Nishi et al.
patent: 4912632 (1990-03-01), Gach et al.
patent: 4959793 (1990-09-01), Suzuki
patent: 4980828 (1990-12-01), Kapcio et al.
patent: 4992960 (1991-02-01), Yamaoka et al.
patent: 5185859 (1993-02-01), Guttag et al.

Affiliated with

Also associated with

Rating

Bus architecture for integrated data and video memory does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Bus architecture for integrated data and video memory, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Bus architecture for integrated data and video memory will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1856686