Arrangement for ESD protection of an integrated circuit
Array fuse damage protection devices and fabrication method
Array of sidewall-contacted antifuses having diffused bit lines
Array of vertical bipolar junction transistors, in...
Array protection devices and method
Array substrate for use in LCD device and method of...
Array substrate, method of manufacturing the same and method...
Asymmetric snubber resistor
Back end of the line structures with liner and noble metal...
Back end of the line structures with liner and noble metal...
Back-biased MOS device
Balanced integrated semiconductor device operating with a parall
Band gap reference power supply device
Bar circuit for an integrated circuit
Battery mounted integrated circuit device having diffusion...
Biasable isolation regions using epitaxially grown silicon...
BICDMOS structures
BiCMOS performance enhancement by mechanical uniaxial strain...
BiCMOS technology on SOI substrates
Bipolar device