Array of vertical bipolar junction transistors, in...

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Including dielectric isolation means

Reexamination Certificate

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C257S005000, C257SE27055, C257SE27076, C257SE29030, C257SE29033, C257SE29034, C257SE29114, C257SE21608, C257SE45002, C438S309000, C438S318000, C438S315000, C438S353000, C438S355000, C438S359000

Reexamination Certificate

active

07872326

ABSTRACT:
A process for manufacturing an array of bipolar transistors, wherein deep field insulation regions of dielectric material are formed in a semiconductor body, thereby defining a plurality of active areas, insulated from each other and a plurality of bipolar transistors are formed in each active area. In particular, in each active area, a first conduction region is formed at a distance from the surface of the semiconductor body; a control region is formed on the first conduction region; and, in each control region, at least two second conduction regions and at least one control contact region are formed. The control contact region is interposed between the second conduction regions and at least two surface field insulation regions are thermally grown in each active area between the control contact region and the second conduction regions.

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patent: 2002/0079483 (2002-06-01), Dennison
patent: 2002/0079524 (2002-06-01), Dennison
patent: 2002/0081807 (2002-06-01), Xu
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patent: 0224857 (1987-06-01), None
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patent: 1408550 (2004-04-01), None
patent: 03073511 (2003-09-01), None

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