Array fuse damage protection devices and fabrication method

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics

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Details

257209, 257665, 257758, 3652257, H01L 2702

Patent

active

054204550

ABSTRACT:
The present disclosure sets forth an improved integrated circuit in which circuit elements, adjacent to a fuse, are protected by barriers positioned adjacent the fuse. In the improved integrated circuit the barriers are non-frangible, high melting point structures buried in the passivating layer, covering a wiring layer containing a fuse, and are between the fuse and adjacent circuit elements in the wiring layer structures.
Also taught is a method of protecting circuit elements adjacent a fuse comprising the steps of depositing an insulating layer on the surface of a semiconductor device having active regions therein, forming a plurality of fuses and circuit elements in said layer, coating said fuses and elements with a second insulating layer, patterning said second insulating layer to form grooves between each of said fuses and any adjacent fuse or circuit element, and depositing a high melting point and non-frangible material in said grooves.

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patent: 5024970 (1991-06-01), Mori
patent: 5025300 (1991-06-01), Billig et al.
patent: 5041897 (1991-08-01), Machida et al.
patent: 5157001 (1992-10-01), Sakuma
patent: 5285099 (1994-02-01), Carruthers et al.

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