Peripheral circuits of electrically programmable...

Details Peripheral circuits of electrically programmable... Peripheral circuits of electrically programmable...

2005-06-14

2005-06-14

Ngô, Ngân V. (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Gate arrays

With particular signal path connections

C257S390000

Reexamination Certificate

active

06906361

ABSTRACT:
The present invention makes improvements to the peripheral circuits of the electrically programmable three-dimensional memory (EP-3DM). Full-read mode and self-timing are used to improve the speed and lower the power consumption Cached EP-3DM is disclosed to reduce the latency. Redundancy can be employed to improve the yield of the EP-3DM.

REFERENCES:
patent: 6288958 (2001-09-01), Suzuki
patent: 6771538 (2004-08-01), Shukuri et al.

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