Power and ground routing of integrated circuit devices with...

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular power supply distribution means

Reexamination Certificate

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Details

C257S758000, C257S759000, C257S765000, C257S771000, C257SE27070

Reexamination Certificate

active

08072004

ABSTRACT:
An integrated circuit chip includes a semiconductor substrate having thereon a plurality of inter-metal dielectric (IMD) layers and a plurality of first conductive layers embedded in respective the plurality of IMD layers, wherein the first conductive layers comprise copper; a first passivation layer overlying the plurality of IMD layers and the plurality of first conductive layers; a plurality of first power/ground mesh wiring lines, formed in a second conductive layer overlying the first passivation layer, for distributing power signal or ground signal, wherein the second conductive layer comprise aluminum; and a second passivation layer covering the second conductive layer and the first passivation layer.

REFERENCES:
patent: 6551856 (2003-04-01), Lee
patent: 6717270 (2004-04-01), Downey
patent: 6835642 (2004-12-01), Yang
patent: 6900541 (2005-05-01), Wang et al.
patent: 2002/0190390 (2002-12-01), Lu
patent: 2005/0202221 (2005-09-01), Wang et al.
patent: 2006/0163734 (2006-07-01), Thei et al.
patent: 2007/0176292 (2007-08-01), Chen et al.

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