Pad current splitting

Details Pad current splitting Pad current splitting

2008-05-13

2009-06-30

Soward, Ida M (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Gate arrays

With particular chip input/output means

C257S207000, C257S208000, C257S691000, C257SE23010, C257SE23015, C257SE23153

Reexamination Certificate

active

07554133

ABSTRACT:
An integrated circuit with a monolithic semiconducting substrate formed in a chip, where the chip has a peripheral edge, a backside, and an opposing top on which circuitry is formed. A first ring of bonding pads is formed along at least a portion of the peripheral edge. At least one of the bonding pads is configured as a power pad, and at least one of the bonding pads is configured as a ground pad. An intermediate power bus is disposed interior to the first ring of bonding pads on the chip, and forms no direct electrical connections to any core devices. An intermediate ground bus is also disposed interior to the first ring of bonding pads on the chip, and forms no direct electrical connections to any core devices. A power pad wire forms an exclusive electrical connection between the power pad and the intermediate power bus. A ground pad wire forms an exclusive electrical connection between the ground pad and the intermediate ground bus. A power strap forms an electrical connection between the intermediate power bus and a power mesh. A ground strap forms an electrical connection between the intermediate ground bus and a ground mesh.

REFERENCES:
patent: 5401989 (1995-03-01), Kikuchi
patent: 6222213 (2001-04-01), Fujiwara
patent: 6339234 (2002-01-01), Takizawa
patent: 6744081 (2004-06-01), Ratchkov et al.
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patent: 7462887 (2008-12-01), Koike et al.
patent: 7491986 (2009-02-01), Kumagae et al.
patent: 2002/0157082 (2002-10-01), Shau
patent: 2007/0090401 (2007-04-01), Baumann et al.
patent: 2008/0258177 (2008-10-01), Ikeda et al.

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