Power and ground routing of integrated circuit devices with...

Details Power and ground routing of integrated circuit devices with... Power and ground routing of integrated circuit devices with...

2008-03-21

2010-10-26

Huynh, Andy (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Gate arrays

With particular power supply distribution means

C257S758000, C257S759000, C257S762000, C257S765000, C257SE27070

Reexamination Certificate

active

07821038

ABSTRACT:
An integrated circuit chip with reduced IR drop and improved chip performance is disclosed. The integrated circuit chip includes a semiconductor substrate having thereon a plurality of inter-metal dielectric (IMD) layers and a plurality of copper metal layers embedded in respective the plurality of IMD layers; a first passivation layer overlying the plurality of IMD layers and the plurality of copper metal layers; a first power/ground ring of a circuit block of the integrated circuit chip formed in a topmost layer of the plurality of copper metal layers; a second power/ground ring of the circuit block of the integrated circuit chip formed in an aluminum layer over the first passivation layer; and a second passivation layer covering the second power/ground ring and the first passivation layer.

REFERENCES:
patent: 6551856 (2003-04-01), Lee
patent: 6717270 (2004-04-01), Downey et al.
patent: 6835642 (2004-12-01), Yang et al.
patent: 2002/0190390 (2002-12-01), Lu et al.

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