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Integrated circuit with fuse element and contact pad

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular signal path connections
Reexamination Certificate

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Integrated circuit with gate-array interconnections routed over

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular power supply distribution means
Patent

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Integrated circuit with layout effective for high-speed processi

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular signal path connections
Patent

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Integrated circuit with reduced analog coupling noise

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – Having specific type of active device
Reexamination Certificate

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Integrated circuit with reduced analog coupling noise

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – Having specific type of active device
Reexamination Certificate

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Integrated circuit with variable pad pitch

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays
Patent

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Integrated circuit with variable pad pitch

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular chip input/output means
Patent

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Integrated CMOS gate-array circuit

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – Having specific type of active device
Patent

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Integrated semiconductor circuit having contact points and...

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular signal path connections
Reexamination Certificate

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Integrated semiconductor configuration

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular signal path connections
Patent

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Inter-tile buffer system for a field programmable gate array

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular signal path connections
Reexamination Certificate

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Interconnect structure with programmable IC for interconnecting

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular signal path connections
Patent

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Interconnect substrate with circuits for field-programmability a

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular signal path connections
Patent

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Interconnect substrate with circuits for field-programmability a

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular signal path connections
Patent

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Interconnect substrate with circuits for field-programmability a

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular signal path connections
Patent

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Interconnection structure of a semiconductor device

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays
Reexamination Certificate

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Interconnection utilizing diagonal routing

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular signal path connections
Reexamination Certificate

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Interleaved termination ring

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular power supply distribution means
Reexamination Certificate

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