Four vertically stacked memory layers in a non-volatile...
Four-bit FinFET NVRAM memory device
Four-terminal system for reading the state of a phase qubit
Fowler-Nordheim block alterable EEPROM memory cell
FRAM and method of fabricating the same
Frame shutter pixel with an isolated storage node
Free layer/capping layer for high performance MRAM MTJ
French-type semiconductor memory device with enhanced trench cap
Fringing field induced localized charge trapping memory
Fringing field induced localized charge trapping memory
Front stage process of a fully depleted silicon-on-insulator...
Frontside contact on silicon-on-insulator substrate
Full CMOS SRAM cell comprising Vcc and Vss buses on both sides o
Full-featured EEPROM
Fully CMOS-type SRAM device with grounding wire having contact h
Fully depleted lateral transistor
Fully depleted silicon on insulator semiconductor device and...
Fully depleted silicon-on-insulator CMOS logic
Fully depleted silicon-on-insulator CMOS logic
Fully depleted SOI device with tungsten damascene contacts...