Fully CMOS-type SRAM device with grounding wire having contact h

Details Fully CMOS-type SRAM device with grounding wire having contact h Fully CMOS-type SRAM device with grounding wire having contact h

1992-08-28

1994-10-04

Limanek, Robert

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257 69, 257660, 257903, H01L 2704

Patent

active

053529162

ABSTRACT:
A grounding wiring layer is provided on the substantially entire region between driver MOS transistors and load MOS thin film transistors of a flip-flop type memory cell. The contact holes for connecting the gate electrodes of the MOS thin film transistors with storage nodes are formed by providing a side wall on the inner wall of each of the contact hole portions formed in the grounding wiring layer and inter-layer insulating films sandwiching it. Thus, the impedance of the grounding wiring layer can be reduced to stabilize the operation of a miniaturized SRAM memory cell using the load MOS thin film transistors. The resistance against soft error caused by .alpha.-ray can also be improved.

REFERENCES:
patent: 4980732 (1990-12-01), Okazawa
patent: 5132771 (1992-07-01), Yamanaka et al.
"A Memory Cell with Polysilicon Thin Film Transistor (TFT) for a 4Mbit SRAM", by K. Tsutsuei et al., "Singaku Giho", (SDM90-25), vol. 90, No. 48, pp. 7-13.

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