Large-area nanoenabled macroelectronic substrates and uses...
Laser defined pads for flip chip on leadframe package
Laser mark on an IC component
Laser process for reliable and low-resistance electrical...
Laser wire bonding for wire embedded dielectrics to integrated c
Layer-type ball grid array semiconductor package and...
Layered chip package and method of manufacturing same
Layered dielectric film structure suitable for gate...
Layered low dielectric constant technology
Layered microelectronic contact and method for fabricating same
Layered semiconductor devices with conductive vias
Layered structure for electron device including regions of...
Layered structure, electron device, and an electron device...
Layered system with an electrically activatable layer
Layered wiring line of silver alloy and method for forming...
Layout and process to contact sub-lithographic structures
Layout for a ball grid array
Layout structure for a flip chip semiconductor integrated...
Layout structure of electrostatic discharge protection circuit
Ldmos transistor with thick copper interconnect