Structure and method for transverse field enhancement
Structure and method of multiplexing bitline signals within...
Structure and method of using asymmetric junction engineered...
Structure and system-on-chip integration of a two-transistor...
Structure for a configurable SRAM system and method
Structure for cross coupled thin film transistors and static ran
Structure for low cost mixed memory integration, new NVRAM struc
Structure of magnetic random access memory using spin-torque...
Structure of static random access memory with stress...
Structures for reduced topography capacitors
Structures for resistive random access memory cells
Structures of a low-voltage-operative non-volatile ferroelectric
Structures, methods, and systems for ferroelectric memory...
STT-MRAM bit cell having a rectangular bottom electrode...
Stuck-at defect condition repair for a non-volatile memory cell
Substrate-fed injection-coupled memory
Superconducting circuit for high-speed lookup table
Superconducting circuit for high-speed lookup table
Superconducting fault-tolerant programmable memory cell incorpor
Superconducting magnetic memory device having intentionally indu