Structure and method of multiplexing bitline signals within...

Static information storage and retrieval – Systems using particular element – Capacitors

Reexamination Certificate

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C365S063000, C257S306000

Reexamination Certificate

active

06839267

ABSTRACT:
An integrated circuit memory is provided in which a multiplexer is operable to select one of a plurality of bitlines to couple to a master bitline using select transistors of an array of transistors, the array of transistors including access transistors of a storage cell array of the memory.

REFERENCES:
patent: 5917744 (1999-06-01), Kirihata et al.
patent: 6399447 (2002-06-01), Clevenger et al.
patent: 6456521 (2002-09-01), Hsu et al.
patent: 6504204 (2003-01-01), Hsu et al.
patent: 20020196651 (2002-12-01), Weis

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