Substrate-fed injection-coupled memory

Details Substrate-fed injection-coupled memory Substrate-fed injection-coupled memory

1977-05-03

1979-03-13

Larkins, William D.

Static information storage and retrieval

Systems using particular element

Flip-flop

307238, 357 44, 357 45, 357 46, 357 92, 365181, H01L 2710, G11C 1140

Patent

active

041445864

ABSTRACT:
This relates to an integrated injection logic (I.sup.2 L) bi-polar memory cell employing both vertical and lateral injectors. The two embodiments disclosed have been optimized with respect to layout in a word-organized array such that coupling between surface regions and coupling to read/write-write/read lines can be manufactured during a single metallization step. To this end, the substrate forms the common injector of the vertical pnp transistors.

REFERENCES:
patent: 3643235 (1972-02-01), Berger et al.
patent: 3815106 (1974-06-01), Wiedmann
patent: 4056810 (1977-11-01), Hart et al.
patent: 4081697 (1978-03-01), Nakano

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