SRAM and method of controlling the SRAM

SRAM architecture

SRAM array with dynamic voltage for reducing active leakage...

SRAM cell and array thereof

SRAM cell and integrated memory circuit using the same

SRAM cell and method of manufacturing the same

SRAM cell and SRAM device

SRAM cell array structure

SRAM cell comprising a reference transistor for neutralizing...

SRAM cell configuration and method for its fabrication

SRAM cell design with high resistor CMOS gate structure for...

SRAM cell design with high resistor CMOS gate structure for...

SRAM cell employing substantially vertically elongated pull-up r

SRAM cell employing substantially vertically elongated pull-up r

SRAM cell employing substantially vertically elongated pull-up r

Sram cell employing substantially vertically elongated pull-up r

SRAM cell employing substantially vertically elongated pull-up r

SRAM cell employing substantially vertically elongated pull-up r

SRAM cell employing substantially vertically elongated pull-up r

SRAM cell employing substantially vertically elongated pull-up r