SRAM cell and method of manufacturing the same

Details SRAM cell and method of manufacturing the same SRAM cell and method of manufacturing the same

1997-06-25

1999-05-25

Nelms, David

Static information storage and retrieval

Systems using particular element

Flip-flop

365154, 365187, G11C 1100

Patent

active

059075023

ABSTRACT:
The present invention discloses a static random access memory cell having a reduced cell size and method of manufacturing the same. According to the invention, the SRAM cell includes: a word line and a bit line; an access device connected to the word and bit lines, wherein in case that the word line is selected, the access device outputs data inputted from the bit line; a pull-up device connected to the access device as well as to a predetermined power voltage, wherein the pull-up device operates in pull-up manner according to the data inputted from the access device; and a pull-down device connected to the access device and the pull-up device as well as to a ground, wherein the pull-down device operates in pull-down manner according to the data inputted from the access devices.

REFERENCES:
patent: 5225693 (1993-07-01), Hirayama
patent: 5373170 (1994-12-01), Pfiester et al.
patent: 5394358 (1995-02-01), Huang
patent: 5491654 (1996-02-01), Azuma
Translation of Purpose and Constitution of Japanese Laid-Open No. 58-130560.
"Microelectronics" Second Edition, J. Millman et al McGraw-Hill Book Company, 1988, pp. 356-358.
"Fundamentals of MOS Digital Integrated Circuits" by J. Uyemura, Addison-Wesley Publishing Co., 1988, p. 586.
Hanchek et al., "Node-Covering Based Defect and Fault Tolerance Methods for Increased Yield in FPGAs," Ninth International Conference on VLSI Design, Jan., 1996.

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