SRAM cell array structure

Static information storage and retrieval – Systems using particular element – Flip-flop

Reexamination Certificate

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Details

C365S049110, C365S049100, C365S189160

Reexamination Certificate

active

07952911

ABSTRACT:
This invention discloses a static random access memory (SRAM) cell array structure which comprises a first and second bit-line coupled to a column of SRAM cells, the first and second bit-lines being substantially parallel to each other and formed by a first metal layer, and a first conductive line being placed between the first and second bit-lines and spanning across the column of SRAM cells without making conductive coupling thereto, the first conductive line being also formed by the first metal layer.

REFERENCES:
patent: 2006/0262628 (2006-11-01), Nii et al.
patent: 2008/0112212 (2008-05-01), Wang et al.
patent: 2009/0116308 (2009-05-01), Van Winkelhoff et al.
patent: 101064297 (2007-10-01), None
China Office Action dated Sep. 14, 2010.

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