SRAM and method of controlling the SRAM

Details SRAM and method of controlling the SRAM SRAM and method of controlling the SRAM

2011-01-25

2011-01-25

Nguyen, VanThu (Department: 2824)

Static information storage and retrieval

Systems using particular element

Flip-flop

C365S226000, C365S189060

Reexamination Certificate

active

07876600

ABSTRACT:
An SRAM and a forming method and a controlling method thereof are provided. The above-mentioned SRAM includes a tracking column, a normal column, a cell voltage control circuit and a cell voltage pull-down circuit. Each of the tracking column and the normal column includes a plurality of memory cells. The cell voltage control circuit is coupled to the tracking column and the normal column for connecting an operation voltage to the two columns before a write operation of the SRAM starts and for disconnecting the operation voltage from the two columns after the write operation starts. The cell voltage pull-down circuit is coupled to the two columns for pulling down the cell voltages of the two columns after the write operation starts and for ceasing pulling down the cell voltage of the normal column when the cell voltage of the tracking column drops down to a predetermined voltage.

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Shigeki Ohbayashi et al., “A 65-nm SoC Embedded 6T-SRAM Designed for Manufacturability with Read and Write Operation Stabilizing Circuits,” IEEE Journal of Solid-State Circuits, vol. 42, No. 4, Apr. 2007, pp. 820-829.

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