Semiconductor memory with delay means to reduce peak currents

Semiconductor memory with divided readout from storage

Semiconductor memory with externally controlled dummy comparator

Semiconductor memory with hierarchical bit lines

Semiconductor memory with improved auto precharge

Semiconductor memory with improved cell arrangement

Semiconductor memory with improved data programming time

Semiconductor memory with improved memory block switching

Semiconductor memory with improved redundant sense amplifier con

Semiconductor memory with improved redundant sense amplifier con

Semiconductor memory with improved test mode

Semiconductor memory with improved transfer gate drivers

Semiconductor memory with improved write function

Semiconductor memory with inhibited test mode entry during power

Semiconductor memory with inverted write-back capability and met

Semiconductor memory with jointly usable fuses

Semiconductor memory with load controlling feedback means to red

Semiconductor memory with memory matrix comprising redundancy ce

Semiconductor memory with multiple clocking for test mode entry

Semiconductor memory with multiple sets & redundant cells