Semiconductor memory with improved cell arrangement

Details Semiconductor memory with improved cell arrangement Semiconductor memory with improved cell arrangement

1987-12-28

1989-10-17

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

Differential sensing

365210, 365222, G11C 1300

Patent

active

048751936

ABSTRACT:
A dynamic type semiconductor memory having an improved operation speed and operable by a small power consumption is disclosed. The memory cell includes a pair of bit lines which are divided into a plurality of sections, a plurality of first amplifiers provided for the sections, a second amplifier provided for the pair of bit lines. The first sense amplifier amplifies the signal at the relevant section and the second amplifier amplifies the signal from the first sense amplifier to drive a bus lines.

REFERENCES:
patent: 4367540 (1983-01-01), Shimohigashi

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