Semiconductor memory having hierarchical bit line structure

Semiconductor memory having improved data readout scheme

Semiconductor memory having improved sense amplifier

Semiconductor memory having improved sense amplifiers

Semiconductor memory having improved sensing arrangement

Semiconductor memory having load devices controlled by a write s

Semiconductor memory having memory cells requiring refresh...

Semiconductor memory having mirroring function

Semiconductor memory having mode register access in burst mode

Semiconductor memory having multiple level storage structure

Semiconductor memory having multiple redundant columns with offs

Semiconductor memory having multiple redundant columns with...

Semiconductor memory having multiple redundant columns with...

Semiconductor memory having multiple redundant columns with...

Semiconductor memory having multiple redundant columns with...

Semiconductor memory having one-transistor/one-capacitor memory

Semiconductor memory having parallel test mode

Semiconductor memory having predecoder control of spare column s

Semiconductor memory having reduced time for writing...

Semiconductor memory having redundancy