Semiconductor memory having load devices controlled by a write s

Static information storage and retrieval – Read/write circuit – For complementary information

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Details

365194, 365203, 365227, G11C 700

Patent

active

046655077

ABSTRACT:
To reduce the power dissipation of a static random access memory, a write enable signal is applied to the gates of load MOS transistors on bit lines which are connected to a memory cell. During the write-in time, the load MOS transistors are turned off so as to prevent as electric current from flowing from a power source into the earth through the memory cell.

REFERENCES:
patent: 4300213 (1981-11-01), Tanimura et al.

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