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Register protection structure for FPGA

Static information storage and retrieval – Read/write circuit – Including specified plural element logic arrangement
Patent

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Register providing simultaneous reading and writing to multiple

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent

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Register without restriction of number of mounted memory...

Static information storage and retrieval – Read/write circuit – With shift register
Reexamination Certificate

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Register write bit protection apparatus and method

Static information storage and retrieval – Read/write circuit – Signals
Patent

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Register-based redundancy circuit and method for built-in self-r

Static information storage and retrieval – Read/write circuit – Bad bit
Patent

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Registered outputs for a memory device

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent

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Regressive drive sense amplifier

Static information storage and retrieval – Read/write circuit – Differential sensing
Patent

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Regressive drive sense amplifier

Static information storage and retrieval – Read/write circuit – Differential sensing
Patent

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Regressive drive sense amplifier

Static information storage and retrieval – Read/write circuit – Differential sensing
Patent

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Regular expression search engine

Static information storage and retrieval – Read/write circuit – Multiplexing
Reexamination Certificate

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Regulating voltages for refresh operation using flash trim...

Static information storage and retrieval – Read/write circuit – Data refresh
Reexamination Certificate

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Regulating voltages for refresh operation using flash trim...

Static information storage and retrieval – Read/write circuit – Data refresh
Reexamination Certificate

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Regulating voltages in semiconductor devices

Static information storage and retrieval – Read/write circuit – Data refresh
Reexamination Certificate

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Relaxed write timing for a memory device

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent

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Reliability test method and circuit for non-volatile memory

Static information storage and retrieval – Read/write circuit – Testing
Reexamination Certificate

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Reliability test method for a ferroelectric memory device

Static information storage and retrieval – Read/write circuit – Testing
Reexamination Certificate

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Reliable self-refreshing operation in a dram type of semiconduct

Static information storage and retrieval – Read/write circuit – Data refresh
Patent

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Repair analysis circuit for redundancy, redundant repairing...

Static information storage and retrieval – Read/write circuit – Bad bit
Reexamination Certificate

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Repair apparatus and method for semiconductor memory device...

Static information storage and retrieval – Read/write circuit – Bad bit
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Repair circuit

Static information storage and retrieval – Read/write circuit – Bad bit
Reexamination Certificate

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