Register protection structure for FPGA

Details Register protection structure for FPGA Register protection structure for FPGA

1995-06-06

1997-02-04

Nelms, David C.

Static information storage and retrieval

Read/write circuit

Including specified plural element logic arrangement

326 38, 377 28, G11C 700

Patent

active

056005970

ABSTRACT:
In an FPGA having registers which are part of a user's logic functions and a configuration memory which is read and written through an addressing structure, a register protect circuit controllably protects the contects of these user logic registers from being modified by signals from the user's logic, allows these registers to be written by a microprocessor through the configuration memory addressing structure, and allows both the user's registers and lines which provide combinational signals to be read by a microprocessor through the configuration memory addressing structure.

REFERENCES:
patent: 5121006 (1992-06-01), Pedersen
patent: 5352940 (1994-10-01), Watson
patent: 5457408 (1995-10-01), Leung
Betty Prince, "Semiconductor Memories", copyright 1983, 1991, John Wiley & Sons, pp. 149-174.

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