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Register bank bit lines

Static information storage and retrieval – Addressing – Plural blocks or banks
Patent

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Register file

Static information storage and retrieval – Addressing – Multiple port access
Reexamination Certificate

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Register file read/write cell

Static information storage and retrieval – Addressing – Multiple port access
Patent

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Register file with improved noise immunity and aspect ratio

Static information storage and retrieval – Addressing
Reexamination Certificate

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Register read for volatile memory

Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate

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Register read for volatile memory

Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate

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Register structure with a dual-ended write mechanism

Static information storage and retrieval – Addressing – Multiple port access
Reexamination Certificate

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Relaxed write timing for a memory device

Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate

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Reliability clock domain crossing

Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate

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Repeater with threshold modulation

Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Patent

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Resistance semiconductor memory device having...

Static information storage and retrieval – Addressing – Plural blocks or banks
Reexamination Certificate

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Reversible polarity decoder circuit

Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Reexamination Certificate

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Reversible-polarity decoder circuit and method

Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Reexamination Certificate

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RISC processor having improved instruction fetching capability a

Static information storage and retrieval – Addressing – Plural blocks or banks
Patent

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Roll call decoder for semiconductor memory having redundant memo

Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Patent

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ROM circuit

Static information storage and retrieval – Addressing – Multiple port access
Patent

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ROM/RAM overlap circuit

Static information storage and retrieval – Addressing – Sync/clocking
Patent

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Row access information transfer device using internal wiring...

Static information storage and retrieval – Addressing – Plural blocks or banks
Reexamination Certificate

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Row active time control circuit and a semiconductor memory...

Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Reexamination Certificate

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Row address control circuits having a predecoding address sampli

Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Patent

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