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SOI device with reduced drain induced barrier lowering

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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SOI device with reduced drain induced barrier lowering

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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SOI device with reduced junction capacitance

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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SOI device with reduced junction capacitance

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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SOI device with wrap-around contact to underside of body,...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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SOI FET and method for creating FET body connections with...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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SOI field effect transistor element having a recombination...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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SOI low capacitance body contact

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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SOI pass-gate disturb solution

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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SOI semiconductor device with body contact and method thereof

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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SOI semiconductor device with reduced topography above a...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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SOI semiconductor integrated circuit for eliminating...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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SOI SRAM device structure with increased W and full depletion

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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SOI structure comprising substrate contacts on both sides of...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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SOI substrate and manufacturing method thereof

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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SOI substrate and SOI device, and method for forming the same

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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SOI substrate manufacturing method

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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SOI substrate, method of manufacture thereof, and...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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SOI substrates and SOI devices, and methods for forming the...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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SOI transistor with body contact and method of forming same

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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