Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2007-11-20
2007-11-20
Dang, Trung (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S163000, C257SE21094, C257SE21104
Reexamination Certificate
active
11027853
ABSTRACT:
An SOI device, and a method for producing the SOI device, for use in an SRAM memory having enhanced stability. The SRAM is formed with a wider W and a fully-depleted FET. The wider FET is extended by an expitaxial silicon sidewall, and the performance of the FET is improved.
REFERENCES:
patent: 5310456 (1994-05-01), Kadomura
patent: 5314575 (1994-05-01), Yanagida
patent: 5338399 (1994-08-01), Yanagida
patent: 5366590 (1994-11-01), Kadomura
patent: 5705421 (1998-01-01), Matsushita et al.
patent: 5916411 (1999-06-01), Nogami
patent: 6383907 (2002-05-01), Hasegawa et al.
patent: 6407011 (2002-06-01), Ikeda et al.
patent: 6562665 (2003-05-01), Yu
patent: 6709982 (2004-03-01), Buynoski et al.
patent: 6783644 (2004-08-01), Tonosaki et al.
patent: 6787457 (2004-09-01), Yanagawa et al.
patent: 6867433 (2005-03-01), Yeo et al.
patent: 7229877 (2007-06-01), Cheng et al.
patent: 2004/0259295 (2004-12-01), Tomiye et al.
patent: 2006/0043472 (2006-03-01), Wang et al.
Dang Trung
Mayer & Williams PC
Sony Electronics Inc.
Wieczorek, Esq. Mark D.
Williams Esq. Karin L.
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