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Nitride-encapsulated FET (NNCFET)

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Nitride-oxide sidewall spacer for salicide formation

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Nitridization of the pre-ddi screen oxide

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Nitrogen based implants for defect reduction in strained...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Nitrogen implant after bit-line formation for ONO flash...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Nitrogen implant into nitride spacer to reduce nickel...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Nitrogen-rich silicon nitride sidewall spacer deposition

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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NMOS electrostatic discharge protection device and method for CM

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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NMOS ESD protection device with thin silicide and methods...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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NMOS field effect transistors and methods of forming NMOS field

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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NMOS transistor devices and methods for fabricating same

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Non volatile embedded memory with poly protection layer

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Non-Continuous encapsulation layer for MIM capacitor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Non-distort spacer profile during subsequent processing

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Non-oxidizing spacer densification method for manufacturing...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Non-oxidizing spacer densification method for manufacturing...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Non-planar non-volatile memory cell with an erase gate, an...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Non-reducing process for deposition of polysilicon gate...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Non-self-aligned side channel implants for flash memory cells

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Non-thermally annealed doped semiconductor material and...

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