Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2011-08-09
2011-08-09
Nguyen, Cuong Q (Department: 2811)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S305000
Reexamination Certificate
active
07994015
ABSTRACT:
NMOS transistors having controlled channel strain and junction resistance and methods for the fabrication of same are provided herein. In some embodiments, a method for forming an NMOS transistor may include providing a substrate having a p-type silicon region and a gate stack disposed thereon, the gate stack partially defining a source and a drain region; depositing an undoped first silicon layer having a lattice adjusting element atop the p-type silicon region and within the source and the drain regions; and depositing a second silicon layer having a lattice adjusting element and an n-type dopant atop the undoped first silicon layer.
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Cho Yonah
Nouri Faran
Thirupapuliyur Sunderraj
Applied Materials Inc.
Nguyen Cuong Q
Taboada Alan
Taboada Moser
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